Teledyne Technologies

  • Senior Firmware Design Engineer

    Job Locations US-CA-Camarillo
    Requisition ID
    2018-6219
    Company Name
    Teledyne Scientific & Imaging
    Shift
    1st Shift - Day
    Citizenship/Visa Requirement
    US Citizen Only
    Internal Code (for CareerBuilder)
    #CB#
  • Company Overview

    Teledyne Technologies Incorporated specializes in providing a broad range of high technology solutions and products to the marketplace. Teledyne Imaging Sensors is an integral member of the new Digital Imaging Segment of Teledyne Technologies. Imaging Sensors provides advanced imaging solutions for a variety of customers, including the DoD, NASA, prime system integrators, and commercial customers. In the civilian space arena, Teledyne sensors are the most advanced sensors on board the Hubble space telescope, and they are also found on board the majority of NASA space probes and ground based telescopes. In the DoD arena, Teledyne sensors are integrated into several major systems for persistent surveillance, chemical detection, and target identification, among others.

     

    Teledyne is an Equal Opportunity/Affirmative Action employer.  All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, gender, sexual orientation, gender identity, gender expression, transgender, pregnancy, marital status, national origin, ancestry, citizenship status, age, disability, protected Veteran Status, genetics or any other characteristic protected by applicable federal, state, or local law.    

     

    If you need assistance or an accommodation while seeking employment, please email  teledynerecruitment@teledyne.com or call (805)373-4545.  Determinations on requests for reasonable accommodation will be made on a case-by-case basis.  Please note that only those inquiries concerning a request for reasonable accommodation will receive a response.  

    Position Summary and Responsibilities

    Teledyne Imaging Sensors are looking for a senior hardware design engineer for our camera electronics group. The engineer will be responsible for firmware development and embedded code development for advanced camera engines for our infrared camera products. The engineer will work as a team with hardware circuit designers and image processing algorithm architects to implement code for our advanced camera engines.

     

    Job responsibilities:

    As a senior hardware design engineer the following job responsibilities are expected:

    • Plan complex firmware projects and estimation of design effort
    • Execute development projects according to plan
    • Work in a team cooperating with hardware circuit designs, CMOS IC designers and image sensor algorithm architects
    • Implement complex image processing algorithms into RTL (either Verilog or VHDL)
    • Perform verification test and debug of implemented hardware in a lab environment
    • Follow formal design and quality processes and release documentation that follows ISO9001 and AS9100 quality standards
    • Conduct design and code reviews
    • Produce and release design documentation

    Qualifications

    Required Skills:

    • At least 5 years of experience with Xilinx FPGA’s RTL code development
    • Expert level experience with Vivado design tools including Chipscope
    • Expert level experience with RTL code simulations and test benches
    • Experience with embedded C code development (preferably as Xilinx embedded processors such as Microblaze or ARM)
    • Experience with DDR or other memory interfaces
    • Experience with hardware circuit design and peripheral circuits such as ADCs, DACs, temperature sensors, SPI and UART
    • Lab experience with oscilloscopes, logic analyzers, soldering iron, power supplies etc.
    • Experience with hardware trouble shooting

    Preferred skills:

    • Experience Xilinx Zynq FPGA family
    • Experience with GTX receivers, multi gigabit signaling and 8B/10B encoding
    • Experience with Camera-link, Coaxial express or Ethernet interfaces implemented in FPGA’s
    • Experience with AXI4 or AXI4 stream interconnect

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